Design and Implementation of a 6-Bit Johnson Counter Using V...

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Design and Implementation of a 6-Bit Johnson Counter Using VSD Squadron Mini

Event Date: August 28, 2026 | Uploaded: August 31, 2026 | By: SIT Admin

The Department of Electronics and Communication Engineering (ECE), in association with the Institution's Innovation Council (IIC) and Samyak Tech, organized an Inter-Institutional Startup Competition on “Design and Implementation of a 6-Bit Johnson Counter Using VSD Squadron Mini” on 28th August 2026 (Friday). The event aimed to encourage innovation, hands-on embedded hardware design skills, and entrepreneurial thinking among students through a competitive, industry-relevant technical challenge.

A total of 11 teams participated in the competition, with each team designing and implementing a 6-bit Johnson counter on the VSD Squadron Mini board. Teams successfully demonstrated the working of their 6-bit Johnson counters on the VSD Squadron Mini board, showcasing their technical implementation, circuit design understanding, and problem-solving abilities through live demonstrations. Based on the quality of implementation, technical understanding, and presentation, cash prizes were awarded to the top three teams. The first prize of ₹1,500/- was awarded to Team Electrox, the second prize of ₹750/- was awarded to Team Code Crashers, and the third prize of ₹500/- was awarded to Team Goodfellows.

The event served as an effective platform for students to enhance their practical hardware design knowledge, teamwork, presentation skills, and problem-solving abilities, while also fostering an entrepreneurial and innovation-driven mindset in line with the goals of the Institution's Innovation Council.

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