Digital Circuit Design and Protocol Development using Xilinx Vivado
The Department of Electronics and Communication Engineering, Srinivas Institute of Technology, in association with the Placement Cell, successfully organized a six-day workshop titled “Digital Circuit Design and Protocol Development using Xilinx Vivado” from 03-08-2026 to 08-08-2026 for the 7th Sem Students. The workshop was conducted by Mr. Anoop Kumar Pipersahaniyan from Ethnotech. The primary objective of the workshop was to strengthen students’ understanding of digital circuit design, Verilog HDL, FPGA-based implementation, and industry-relevant digital design methodologies. The workshop aimed to bridge the gap between theoretical concepts and practical implementation through hands-on design and simulation exercises using Xilinx Vivado/Cadence.
The workshop covered functional simulation, netlist generation, area, power and timing analysis, placement and routing, and post-route simulation. Students implemented a wide range of digital circuits, including 4-bit Ripple Carry, Carry Lookahead and Carry Select Adders, 8-bit ALU, latches, flip-flops, registers, counters, shift registers, encoders, decoders, FSM-based Fibonacci generator, sequence detector and FIFO, multiplier, divider, MAC unit, RAM, ROM and vending machine controller. The workshop also provided practical exposure to AMBA APB, SPI and I²C protocols using Verilog HDL, enabling students to understand protocol design and digital system integration.
The workshop enabled students to develop practical skills in RTL design, Verilog HDL programming, functional and post-route simulation, FPGA implementation, timing analysis, and digital communication protocol development. As an outcome, students gained hands-on experience in designing, verifying and analysing complex digital systems and developed greater confidence in applying VLSI and FPGA concepts to real-world applications. The workshop also enhanced their industry readiness, problem-solving ability, design verification skills, and preparedness for academic projects, internships, placements and advanced VLSI/FPGA development.
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